#[repr(u8)]pub enum BNLowLevelILOperation {
Show 154 variants
LLIL_NOP = 0,
LLIL_SET_REG = 1,
LLIL_SET_REG_SPLIT = 2,
LLIL_SET_FLAG = 3,
LLIL_SET_REG_STACK_REL = 4,
LLIL_REG_STACK_PUSH = 5,
LLIL_ASSERT = 6,
LLIL_FORCE_VER = 7,
LLIL_LOAD = 8,
LLIL_STORE = 9,
LLIL_PUSH = 10,
LLIL_POP = 11,
LLIL_REG = 12,
LLIL_REG_SPLIT = 13,
LLIL_REG_STACK_REL = 14,
LLIL_REG_STACK_POP = 15,
LLIL_REG_STACK_FREE_REG = 16,
LLIL_REG_STACK_FREE_REL = 17,
LLIL_CONST = 18,
LLIL_CONST_PTR = 19,
LLIL_EXTERN_PTR = 20,
LLIL_FLOAT_CONST = 21,
LLIL_FLAG = 22,
LLIL_FLAG_BIT = 23,
LLIL_ADD = 24,
LLIL_ADC = 25,
LLIL_SUB = 26,
LLIL_SBB = 27,
LLIL_AND = 28,
LLIL_OR = 29,
LLIL_XOR = 30,
LLIL_LSL = 31,
LLIL_LSR = 32,
LLIL_ASR = 33,
LLIL_ROL = 34,
LLIL_RLC = 35,
LLIL_ROR = 36,
LLIL_RRC = 37,
LLIL_MUL = 38,
LLIL_MULU_DP = 39,
LLIL_MULS_DP = 40,
LLIL_DIVU = 41,
LLIL_DIVU_DP = 42,
LLIL_DIVS = 43,
LLIL_DIVS_DP = 44,
LLIL_MODU = 45,
LLIL_MODU_DP = 46,
LLIL_MODS = 47,
LLIL_MODS_DP = 48,
LLIL_NEG = 49,
LLIL_NOT = 50,
LLIL_SX = 51,
LLIL_ZX = 52,
LLIL_LOW_PART = 53,
LLIL_JUMP = 54,
LLIL_JUMP_TO = 55,
LLIL_CALL = 56,
LLIL_CALL_STACK_ADJUST = 57,
LLIL_TAILCALL = 58,
LLIL_RET = 59,
LLIL_NORET = 60,
LLIL_IF = 61,
LLIL_GOTO = 62,
LLIL_FLAG_COND = 63,
LLIL_FLAG_GROUP = 64,
LLIL_CMP_E = 65,
LLIL_CMP_NE = 66,
LLIL_CMP_SLT = 67,
LLIL_CMP_ULT = 68,
LLIL_CMP_SLE = 69,
LLIL_CMP_ULE = 70,
LLIL_CMP_SGE = 71,
LLIL_CMP_UGE = 72,
LLIL_CMP_SGT = 73,
LLIL_CMP_UGT = 74,
LLIL_TEST_BIT = 75,
LLIL_BOOL_TO_INT = 76,
LLIL_ADD_OVERFLOW = 77,
LLIL_SYSCALL = 78,
LLIL_BP = 79,
LLIL_TRAP = 80,
LLIL_INTRINSIC = 81,
LLIL_UNDEF = 82,
LLIL_UNIMPL = 83,
LLIL_UNIMPL_MEM = 84,
LLIL_FADD = 85,
LLIL_FSUB = 86,
LLIL_FMUL = 87,
LLIL_FDIV = 88,
LLIL_FSQRT = 89,
LLIL_FNEG = 90,
LLIL_FABS = 91,
LLIL_FLOAT_TO_INT = 92,
LLIL_INT_TO_FLOAT = 93,
LLIL_FLOAT_CONV = 94,
LLIL_ROUND_TO_INT = 95,
LLIL_FLOOR = 96,
LLIL_CEIL = 97,
LLIL_FTRUNC = 98,
LLIL_FCMP_E = 99,
LLIL_FCMP_NE = 100,
LLIL_FCMP_LT = 101,
LLIL_FCMP_LE = 102,
LLIL_FCMP_GE = 103,
LLIL_FCMP_GT = 104,
LLIL_FCMP_O = 105,
LLIL_FCMP_UO = 106,
LLIL_SET_REG_SSA = 107,
LLIL_SET_REG_SSA_PARTIAL = 108,
LLIL_SET_REG_SPLIT_SSA = 109,
LLIL_SET_REG_STACK_REL_SSA = 110,
LLIL_SET_REG_STACK_ABS_SSA = 111,
LLIL_REG_SPLIT_DEST_SSA = 112,
LLIL_REG_STACK_DEST_SSA = 113,
LLIL_REG_SSA = 114,
LLIL_REG_SSA_PARTIAL = 115,
LLIL_REG_SPLIT_SSA = 116,
LLIL_REG_STACK_REL_SSA = 117,
LLIL_REG_STACK_ABS_SSA = 118,
LLIL_REG_STACK_FREE_REL_SSA = 119,
LLIL_REG_STACK_FREE_ABS_SSA = 120,
LLIL_SET_FLAG_SSA = 121,
LLIL_ASSERT_SSA = 122,
LLIL_FORCE_VER_SSA = 123,
LLIL_FLAG_SSA = 124,
LLIL_FLAG_BIT_SSA = 125,
LLIL_CALL_SSA = 126,
LLIL_SYSCALL_SSA = 127,
LLIL_TAILCALL_SSA = 128,
LLIL_CALL_PARAM = 129,
LLIL_CALL_STACK_SSA = 130,
LLIL_CALL_OUTPUT_SSA = 131,
LLIL_SEPARATE_PARAM_LIST_SSA = 132,
LLIL_SHARED_PARAM_SLOT_SSA = 133,
LLIL_MEMORY_INTRINSIC_OUTPUT_SSA = 134,
LLIL_LOAD_SSA = 135,
LLIL_STORE_SSA = 136,
LLIL_INTRINSIC_SSA = 137,
LLIL_MEMORY_INTRINSIC_SSA = 138,
LLIL_REG_PHI = 139,
LLIL_REG_STACK_PHI = 140,
LLIL_FLAG_PHI = 141,
LLIL_MEM_PHI = 142,
LLIL_BSWAP = 143,
LLIL_POPCNT = 144,
LLIL_CLZ = 145,
LLIL_CTZ = 146,
LLIL_RBIT = 147,
LLIL_CLS = 148,
LLIL_MINS = 149,
LLIL_MAXS = 150,
LLIL_MINU = 151,
LLIL_MAXU = 152,
LLIL_ABS = 153,
}Variants§
LLIL_NOP = 0
LLIL_SET_REG = 1
Not valid in SSA form (see LLIL_SET_REG_SSA)
LLIL_SET_REG_SPLIT = 2
Not valid in SSA form (see LLIL_SET_REG_SPLIT_SSA)
LLIL_SET_FLAG = 3
Not valid in SSA form (see LLIL_SET_FLAG_SSA)
LLIL_SET_REG_STACK_REL = 4
Not valid in SSA form (see LLIL_SET_REG_STACK_REL_SSA)
LLIL_REG_STACK_PUSH = 5
Not valid in SSA form (expanded)
LLIL_ASSERT = 6
LLIL_FORCE_VER = 7
LLIL_LOAD = 8
Not valid in SSA form (see LLIL_LOAD_SSA)
LLIL_STORE = 9
Not valid in SSA form (see LLIL_STORE_SSA)
LLIL_PUSH = 10
Not valid in SSA form (expanded)
LLIL_POP = 11
Not valid in SSA form (expanded)
LLIL_REG = 12
Not valid in SSA form (see LLIL_REG_SSA)
LLIL_REG_SPLIT = 13
Not valid in SSA form (see LLIL_REG_SPLIT_SSA)
LLIL_REG_STACK_REL = 14
Not valid in SSA form (see LLIL_REG_STACK_REL_SSA)
LLIL_REG_STACK_POP = 15
Not valid in SSA form (expanded)
LLIL_REG_STACK_FREE_REG = 16
Not valid in SSA form (see LLIL_REG_STACK_FREE_REL_SSA, LLIL_REG_STACK_FREE_ABS_SSA)
LLIL_REG_STACK_FREE_REL = 17
Not valid in SSA from (see LLIL_REG_STACK_FREE_REL_SSA)
LLIL_CONST = 18
LLIL_CONST_PTR = 19
LLIL_EXTERN_PTR = 20
LLIL_FLOAT_CONST = 21
LLIL_FLAG = 22
Not valid in SSA form (see LLIL_FLAG_SSA)
LLIL_FLAG_BIT = 23
Not valid in SSA form (see LLIL_FLAG_BIT_SSA)
LLIL_ADD = 24
LLIL_ADC = 25
LLIL_SUB = 26
LLIL_SBB = 27
LLIL_AND = 28
LLIL_OR = 29
LLIL_XOR = 30
LLIL_LSL = 31
LLIL_LSR = 32
LLIL_ASR = 33
LLIL_ROL = 34
LLIL_RLC = 35
LLIL_ROR = 36
LLIL_RRC = 37
LLIL_MUL = 38
LLIL_MULU_DP = 39
LLIL_MULS_DP = 40
LLIL_DIVU = 41
LLIL_DIVU_DP = 42
LLIL_DIVS = 43
LLIL_DIVS_DP = 44
LLIL_MODU = 45
LLIL_MODU_DP = 46
LLIL_MODS = 47
LLIL_MODS_DP = 48
LLIL_NEG = 49
LLIL_NOT = 50
LLIL_SX = 51
LLIL_ZX = 52
LLIL_LOW_PART = 53
LLIL_JUMP = 54
LLIL_JUMP_TO = 55
LLIL_CALL = 56
LLIL_CALL_STACK_ADJUST = 57
LLIL_TAILCALL = 58
LLIL_RET = 59
LLIL_NORET = 60
LLIL_IF = 61
LLIL_GOTO = 62
LLIL_FLAG_COND = 63
Valid only in Lifted IL
LLIL_FLAG_GROUP = 64
Valid only in Lifted IL
LLIL_CMP_E = 65
LLIL_CMP_NE = 66
LLIL_CMP_SLT = 67
LLIL_CMP_ULT = 68
LLIL_CMP_SLE = 69
LLIL_CMP_ULE = 70
LLIL_CMP_SGE = 71
LLIL_CMP_UGE = 72
LLIL_CMP_SGT = 73
LLIL_CMP_UGT = 74
LLIL_TEST_BIT = 75
LLIL_BOOL_TO_INT = 76
LLIL_ADD_OVERFLOW = 77
LLIL_SYSCALL = 78
LLIL_BP = 79
LLIL_TRAP = 80
LLIL_INTRINSIC = 81
LLIL_UNDEF = 82
LLIL_UNIMPL = 83
LLIL_UNIMPL_MEM = 84
LLIL_FADD = 85
Floating point
LLIL_FSUB = 86
Floating point
LLIL_FMUL = 87
Floating point
LLIL_FDIV = 88
Floating point
LLIL_FSQRT = 89
Floating point
LLIL_FNEG = 90
Floating point
LLIL_FABS = 91
Floating point
LLIL_FLOAT_TO_INT = 92
Floating point
LLIL_INT_TO_FLOAT = 93
Floating point
LLIL_FLOAT_CONV = 94
Floating point
LLIL_ROUND_TO_INT = 95
Floating point
LLIL_FLOOR = 96
Floating point
LLIL_CEIL = 97
Floating point
LLIL_FTRUNC = 98
Floating point
LLIL_FCMP_E = 99
Floating point
LLIL_FCMP_NE = 100
Floating point
LLIL_FCMP_LT = 101
Floating point
LLIL_FCMP_LE = 102
Floating point
LLIL_FCMP_GE = 103
Floating point
LLIL_FCMP_GT = 104
Floating point
LLIL_FCMP_O = 105
Floating point
LLIL_FCMP_UO = 106
Floating point
LLIL_SET_REG_SSA = 107
The following instructions are only used in SSA form
LLIL_SET_REG_SSA_PARTIAL = 108
The following instructions are only used in SSA form
LLIL_SET_REG_SPLIT_SSA = 109
The following instructions are only used in SSA form
LLIL_SET_REG_STACK_REL_SSA = 110
The following instructions are only used in SSA form
LLIL_SET_REG_STACK_ABS_SSA = 111
The following instructions are only used in SSA form
LLIL_REG_SPLIT_DEST_SSA = 112
Only valid within an LLIL_SET_REG_SPLIT_SSA instruction
LLIL_REG_STACK_DEST_SSA = 113
Only valid within LLIL_SET_REG_STACK_REL_SSA or LLIL_SET_REG_STACK_ABS_SSA
LLIL_REG_SSA = 114
LLIL_REG_SSA_PARTIAL = 115
LLIL_REG_SPLIT_SSA = 116
LLIL_REG_STACK_REL_SSA = 117
LLIL_REG_STACK_ABS_SSA = 118
LLIL_REG_STACK_FREE_REL_SSA = 119
LLIL_REG_STACK_FREE_ABS_SSA = 120
LLIL_SET_FLAG_SSA = 121
LLIL_ASSERT_SSA = 122
LLIL_FORCE_VER_SSA = 123
LLIL_FLAG_SSA = 124
LLIL_FLAG_BIT_SSA = 125
LLIL_CALL_SSA = 126
LLIL_SYSCALL_SSA = 127
LLIL_TAILCALL_SSA = 128
LLIL_CALL_PARAM = 129
Only valid within the LLIL_CALL_SSA, LLIL_SYSCALL_SSA, LLIL_INTRINSIC, LLIL_INTRINSIC_SSA, LLIL_MEMORY_INTRINSIC_SSA, LLIL_TAILCALL, LLIL_TAILCALL_SSA instructions
LLIL_CALL_STACK_SSA = 130
Only valid within the LLIL_CALL_SSA or LLIL_SYSCALL_SSA instructions
LLIL_CALL_OUTPUT_SSA = 131
Only valid within the LLIL_CALL_SSA or LLIL_SYSCALL_SSA instructions
LLIL_SEPARATE_PARAM_LIST_SSA = 132
Only valid within the LLIL_CALL_PARAM instruction
LLIL_SHARED_PARAM_SLOT_SSA = 133
Only valid within the LLIL_CALL_PARAM or LLIL_SEPARATE_PARAM_LIST_SSA instructions
LLIL_MEMORY_INTRINSIC_OUTPUT_SSA = 134
Only valid within the LLIL_MEMORY_INTRINSIC_SSA instruction
LLIL_LOAD_SSA = 135
LLIL_STORE_SSA = 136
LLIL_INTRINSIC_SSA = 137
LLIL_MEMORY_INTRINSIC_SSA = 138
LLIL_REG_PHI = 139
LLIL_REG_STACK_PHI = 140
LLIL_FLAG_PHI = 141
LLIL_MEM_PHI = 142
LLIL_BSWAP = 143
Reverse byte order of the whole value
LLIL_POPCNT = 144
Population count (number of set bits)
LLIL_CLZ = 145
Count leading zero bits; clz(0) == 8 * size
LLIL_CTZ = 146
Count trailing zero bits; ctz(0) == 8 * size
LLIL_RBIT = 147
Reverse bit order of the whole value
LLIL_CLS = 148
Count leading sign bits; number of bits below the sign bit that match it
LLIL_MINS = 149
Signed minimum of left and right
LLIL_MAXS = 150
Signed maximum of left and right
LLIL_MINU = 151
Unsigned minimum of left and right
LLIL_MAXU = 152
Unsigned maximum of left and right
LLIL_ABS = 153
Signed absolute value of src; abs(INT_MIN) == INT_MIN
Trait Implementations§
Source§impl Clone for BNLowLevelILOperation
impl Clone for BNLowLevelILOperation
Source§fn clone(&self) -> BNLowLevelILOperation
fn clone(&self) -> BNLowLevelILOperation
1.0.0 (const: unstable) · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read moreimpl Copy for BNLowLevelILOperation
Source§impl Debug for BNLowLevelILOperation
impl Debug for BNLowLevelILOperation
impl Eq for BNLowLevelILOperation
Source§impl Hash for BNLowLevelILOperation
impl Hash for BNLowLevelILOperation
Source§impl PartialEq for BNLowLevelILOperation
impl PartialEq for BNLowLevelILOperation
Source§fn eq(&self, other: &BNLowLevelILOperation) -> bool
fn eq(&self, other: &BNLowLevelILOperation) -> bool
self and other values to be equal, and is used by ==.